Senior Staff Verification Eng - Embed SOC
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Title: Senior Staff Verification Engineer - Embedded SOC Systems
Our client is an exciting new company that just closed on a sizable Series C Funding package, and they are in need of Verification embedded Engineers. This company is at the forefront of hardware technologies accelerating and optimizing FHE encryption via Artificial Intelligence. They expect to see performance gains in several orders of magnitude which will transform the 300B + Cloud market by ensuring security and stability of data transmission.
The right candidate for this seasoned lead Verification Engineer will have a minimum of 10+ year of experience and has prior experience with verification flows, and building efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. This person will be responsible for the full lifecycle of verification, from verification planning and test execution, to collecting and closing coverage and must be able to define the verification infrastructure, set up the environment and drive the Functional Verification flow.
Expertise is UVM and System Verilog is mandatory.
Expertise in functional coverage flows, property checking and Assertions.
Expertise leading functional verification for embedded SoC systems based on processors such as ARM, X86 or RiscV.
Expertise with SoC verification flows, power simulations, power-on-reset verification.
Prior experience in System Interconnects such as ARM, good understanding of AXI protocols
Strong communication and presentation skills.
BSEE/MSEE is required.