Director Design Verification 

Remote #6043

EDA-Careers represents some of the most promising, thriving private-sector companies in the EDA/SEMI/IP/AI sector, helping them find the finest qualified candidates for their needs.


If you are looking to contribute to the backbone of some of the world’s most popular SoCs, this company is who you want to consider? They went public not too long ago and has masterfully turned into a powerhouse in their domain.

In this position, you will create designs in a powerful language that blends traditional RTL with leading-edge software to provide extremely configurable, testable, and high-quality solutions. A job should be fulfilling at the end of the day, you will fill exactly that and be amazed at all the places where your creations end up. You will play an integral role influencing development environment, architecture, verification, and everything in-between – you’ll no longer be stuck in a silo or just a cog in the machine. Better yet, your co-workers will be an experienced team of industry experts that love what they do.



  • Lead a talented team of design engineers in next-generation product development as a highly technical, hands-on manager.

  • Advanced UVM based test bench development and debugging

  • Defining, documenting, developing and executing RTL verification test/coverage at system level

  • Performance verification and power-aware verification

  • Triaging Regressions, Debugging RTL designs in Verilog and System Verilog

  • Help improve and refine verification process, methodology, and metrics

  • UVM expertise on complex SoC projects from test bench development to verification closure


Experience, Requirements and Qualifications:

  • 5+ years of experience of leading or managing a design team.

  • Proven capability to define and execute to schedule and make priority trade-offs.

  • 10+ years’ experience in ASIC and SoC design

  • Verification flow enhancements using a scripting language such as Shell scripts, Python & JavaScript

  • Strong RTL (Verilog) and UVM/C test bench debugging skills

  • Experience integrating vendor provided VIPs for unit and system level verification

  • Experience with Arm AMBA protocols

  • This opportunity involves high performance, low power designs on a highly visible project

(Attach Resume)