About the Role
Client develops a 3D SRAM that is 5X the density of DRAM (40X TSMC 2nm). More importantly, because it can survive 125C, the 3D SRAM can be hybrid-bonded with GPU/NPUs for ultra-high bandwidth & low power.
Shortly to be released, the simulation result, shows their memory enables 1,000X performance improvement to NVIDEA’s Groq LPU. A leading 3D NAND flash company has started to work with their initial test wafers in Q4 this year.
On the customer front, the company is working with several leading AI companies, and hope to close 1 - 2 lead customers in Q4, ’26. They raised major capital, and they are closing on another round of similar size in a heavily over-subscribed round with two co-lead investors. That path will continue as customers close so they can continue to scale.
I am happy to discuss more about my client and divulge their name once we can chat. I ask that you email me your resume, mark@eda-careers.com, ASAP, so I have a full understanding of your experience. We are hiring now and we are aggressively looking for very senior engineers and management as well.
Requirements
SRAM
High-Speed Memory.
3D Memory
Latest techniques in High-Speed memory Design
Memory Compilers
Memory Circuit Design
About the Company
Thriving start-up with a skilled management team that has led the way in memory design. They are looking for several Founding Engineers that are highly skilled in Memory Design. Various skill levels and experiences should apply, from after intern to VERY SENIOR ENGINEERS.
Get in on the ground floor as they ramp up with their cutting-edge memory technology. Packages are competitive and the founding team is experienced, strong and like I said, well-funded.
To be considered, you should have experience (at various levels) in SRAM Memory Design The comp is very competitive, and the opportunity is real. The founders are strong, the technology advanced, here is a little synopsis.
This is a great growth opportunity for those that love building cutting edge, innovative technology. Candidates must specialize in memory design